From 6d34b7eef0618693915d041fafd32dbda3cd6519 Mon Sep 17 00:00:00 2001 From: Mathieu Maret Date: Sat, 30 Jun 2018 01:00:47 +0200 Subject: [PATCH] idt: reformat code --- idt.c | 68 +++++++++++++++++++++++++++++-------------------------- segment.h | 59 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 95 insertions(+), 32 deletions(-) create mode 100644 segment.h diff --git a/idt.c b/idt.c index 6a63af3..20f5ee5 100644 --- a/idt.c +++ b/idt.c @@ -1,45 +1,44 @@ #include "idt.h" -static struct idtEntry idt[IDT_NUM]; - +static struct idtEntry idt[IDT_NUM]; int idtSetup() { - struct idtRegister idtr; + struct idtRegister idtr; - for (int i = 0; i < IDT_NUM; i++) { - struct idtEntry *idte = idt + i; + for (int i = 0; i < IDT_NUM; i++) { + struct idtEntry *idte = idt + i; - /* Setup an empty IDTE interrupt gate, see figure 5-2 in Intel - x86 doc, vol 3 */ - idte->seg_sel = BUILD_SEGMENT_SELECTOR(RING_0, 0, SEGMENT_IDX_CODE); - idte->reserved = 0; - idte->flags = 0; - idte->type = 0x6; /* Interrupt gate (110b) */ - idte->op_size = 1; /* 32bits instructions */ + /* Setup an empty IDTE interrupt gate, see figure 5-2 in Intel + x86 doc, vol 3 */ + idte->seg_sel = BUILD_SEGMENT_SELECTOR(RING_0, 0, SEGMENT_IDX_CODE); + idte->reserved = 0; + idte->flags = 0; + idte->type = 0x6; /* Interrupt gate (110b) */ + idte->op_size = 1; /* 32bits instructions */ - /* Disabled it for now */ - idte->zero = 0; - idte->offset_low = 0; - idte->offset_high = 0; - idte->dpl = 0; - idte->present = 0; - } + /* Disabled it for now */ + idte->zero = 0; + idte->offset_low = 0; + idte->offset_high = 0; + idte->dpl = 0; + idte->present = 0; + } - /* - * Setup the IDT register, see Intel x86 doc vol 3, section 5.8. - */ + /* + * Setup the IDT register, see Intel x86 doc vol 3, section 5.8. + */ - /* Address of the IDT */ - idtr.base_addr = (uint32_t) idt; + /* Address of the IDT */ + idtr.base_addr = (uint32_t)idt; - /* The limit is the maximum offset in bytes from the base address of - the IDT */ - idtr.limit = sizeof(idt) - 1; + /* The limit is the maximum offset in bytes from the base address of + the IDT */ + idtr.limit = sizeof(idt) - 1; - /* Commit the IDT into the CPU */ - asm volatile ("lidt %0\n"::"m"(idtr):"memory"); - - return 0; + /* Commit the IDT into the CPU */ + asm volatile("lidt %0\n" ::"m"(idtr) : "memory"); + + return 0; } int idt_set_handler(int index, unsigned int addr, int priviledge) @@ -51,13 +50,18 @@ int idt_set_handler(int index, unsigned int addr, int priviledge) if ((priviledge < 0) || priviledge > 3) return -1; - idte = &idt[index]; + idte = idt + index; if (addr != (unsigned int)NULL) { idte->offset_low = addr && 0xffff; idte->offset_high = (addr >> 16) && 0xffff; idte->dpl = priviledge; idte->present = 1; + } else { + idte->offset_low = 0; + idte->offset_high = 0; + idte->dpl = 0; + idte->present = 0; } return 0; diff --git a/segment.h b/segment.h new file mode 100644 index 0000000..0a4b24e --- /dev/null +++ b/segment.h @@ -0,0 +1,59 @@ +/* Copyright (C) 2004 The SOS Team + Copyright (C) 1999 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or + modify it under the terms of the GNU General Public License + as published by the Free Software Foundation; either version 2 + of the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, + USA. +*/ +#ifndef _SOS_HWSEGS_H_ +#define _SOS_HWSEGS_H_ + +/** + * @file segments.h + * + * Global and local (GDT/LDT) segment descriptor definition and + * structure. These segments map virtual addresses (ie + * data/instruction addresses, relative to these segment descriptors) + * to linear addresses (ie addresses in the paged-memory space). + * + * @see Intel x86 doc, vol 3 chapter 3. + */ + +#include "types.h" + +/* + * Global segment selectors (GDT) for SOS/x86. + * + * @see gdt.h + */ +#define SOS_SEG_NULL 0 /* NULL segment, unused by the procesor */ +#define SOS_SEG_KCODE 1 /* Kernel code segment */ +#define SOS_SEG_KDATA 2 /* Kernel data segment */ + + +/** + * Helper macro that builds a segment register's value + */ +#define SOS_BUILD_SEGMENT_REG_VALUE(desc_privilege,in_ldt,seg_index) \ + ( (((desc_privilege) & 0x3) << 0) \ + | (((in_ldt)?1:0) << 2) \ + | ((seg_index) << 3) ) + + +/* + * Local segment selectors (LDT) for SOS/x86 + */ +/* None */ + +#endif /* _SOS_HWSEGS_H_ */